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lt3651-8.2/lt3651-8.4 1 36518284f typical application features applications description monolithic 4a high voltage 2-cell li-ion battery charger n industrial handheld instruments n 12 v to 24v automotive and heavy equipment n desktop cradle chargers n notebook computers 9v to 32v 2-cell 4a charger efficiency, power loss vs v in n wide input voltage range: 9v to 32v (40 v absolute maximum) n programmable charge current up to 4a n selectable c/10 or onboard timer termination n dynamic charge rate programming/soft-start n programmable input current limit n 0.5% float voltage accuracy n 7.5% charge current accuracy n 4% c/10 detection accuracy n ntc resistor temperature monitor n auto-recharge at 97.5% float voltage n auto-precondition at <70% float voltage n bad battery detection with auto-reset n average current mode, synchronous switcher n user programmable frequency n low profile (0.75mm) 5mm 6mm 36-lead qfn package the lt ? 3651-8.2/lt3651-8.4 are 2-cell, 4a li-ion/poly- mer battery chargers that operate over a 9v to 32v input voltage range. an efficient monolithic average current mode synchronous switching regulator provides constant current, constant voltage charging with programmable maximum charge current. a charging cycle starts with battery insertion or when the battery voltage drops 2.5% below the float voltage. charger termination is selectable as either charge current or internal safety timer timeout. charge current termination occurs when the charge cur - rent falls to one-tenth the programmed maximum current (c/10). timer based termination is typically set to three hours and is user programmable (charging continues below c/10 until timeout). once charging is terminated, the lt3651-8.2/lt3651-8.4 supply current drops to 85a into a standby mode. the lt3651-8.2/lt3651-8.4 offer several safety features. a discharged battery is preconditioned with a small trickle charge and generates a signal if unresponsive . a thermistor monitors battery temperature, halting charging if out of range. excessive die temperature reduces charge current. charge current is also reduced to maintain constant input current to prevent excessive input loading. the lt3651-8.2/lt3651-8.4 are available in a 5mm 6mm 36-lead qfn package. l, lt , lt c , lt m , linear technology and the linear logo are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. rt timer boost sense bat i lim rng/ss gnd ntc clp cln 1f 100f 2-cell li-ion battery 365188284 ta01a 10h tdk slp12575t-100m5r4 to system load 24m 301k v in 9v to 32v cmpsh1-4 10v si7611dn 100k 10k lt3651-8.2/lt3651-8.4 v in 22f fault chrg acpr shdn + sw v in (v) 10 85 efficiency (%) power loss (w) 86 87 88 89 90 3.5 4.0 4.5 5.0 5.5 6.0 15 20 25 30 1635 g07 efficiency power loss v bat = 7.8v i bat = 4a
lt3651-8.2/lt3651-8.4 2 36518284f pin configuration absolute maximum ratings (note 1) 11 12 13 14 top view 37 gnd 38 sw uhe package 36-lead (5mm 6mm) plastic qfn 15 16 17 18 36 35 34 33 32 31 30 29 21 22 23 24 25 26 27 28 8 7 6 5 4 3 2 1ntc acpr bat sense boost gnd sw nc nc nc i lim shdn chrg fault timer gnd sw nc nc nc rt rng/ss v in v in v in gnd cln clp sw sw sw sw sw sw sw sw 20 19 9 10 t jmax = 125c, v ja = 43c/w exposed pad (pin 37) is gnd, must be soldered to pcb exposed pad (pin 38) is sw, must be soldered to pcb order information lead free finish tape and reel part marking* package description temperature range lt3651euhe-8.2#pbf lt3651euhe-8.2#trpbf 365182 36-lead (5mm w 6mm) plastic qfn C40c to 125c lt3651iuhe-8.2#pbf lt3651iuhe-8.2#trpbf 365182 36-lead (5mm w 6mm) plastic qfn C40c to 125c lt3651euhe-8.4#pbf lt3651euhe-8.4#trpbf 365184 36-lead (5mm w 6mm) plastic qfn C40c to 125c lt3651iuhe-8.4#pbf lt3651iuhe-8.4#trpbf 365184 36-lead (5mm w 6mm) plastic qfn C40c to 125c consult lt c marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. consult lt c marketing for information on non-standard lead based finish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel / v in .......................................................................... 40 v cln , clp , shdn , chrg , fa u lt , acpr ............................... v in + 0.5 v up to 40 v clp C cln ............................................................. 0.5 v sw ........................................................................... 40 v sw C v in .................................................................. 4.5 v boost .......................................... sw + 10 v up to 50 v sense , bat ............................................................ 10 v sense - bat ............................................. C0.5 v to 0.5 v timer , rng / ss , i lim , ntc , rt .............................. 2.5 v operating junction temperature range ( notes 2, 3) ................................................ C40 to 125 c storage temperature range ...................... C65 to 150 c
lt3651-8.2/lt3651-8.4 3 36518284f the l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = 20v, shdn = 2v, sense = b at = v b at ( f lt ) , c timer = 0.68f, r t = 50k, clp = cln = v in , boost C sw = 4v. electrical characteristics parameter conditions min typ max units v in operating range l 9.0 32 v v in ovlo threshold v in rising 32 35 40 v v in ovlo hysteresis 1.1 v v in uvlo threshold v in rising l 8.7 9.0 v v in uvlo hysteresis 0.2 v battery float voltage, v bat ( f lt ) lt3651-8.2 l 8.16 8.12 8.2 8.24 8.28 v v lt3651-8.4 l 8.36 8.32 8.4 8.44 8.48 v v battery recharge voltage hysteresis threshold voltage relative to v bat ( f lt ) C200 mv battery precondition threshold voltage, v bat (pre) lt3651-8.2, v bat rising lt3651-8.4, v bat rising 5.65 5.80 v v battery precondition threshold hysteresis threshold voltage relative to v bat (pre) 90 mv operating v in supply current cc/cv mode, top switch on, i sw = 0 standby mode shutdown (shdn = 0) 8.6 80 17 ma a a top switch on voltage v in C v sw , i sw = 4a 480 mv bottom switch on voltage v sw , i sw = 4a C140 mv boost supply current switch high, i sw = 0, 2.5v < (v boost C v sw ) < 8.5v 40 ma boost switch drive i boost /i sw , i sw = 4a 25 ma/a precondition current sense voltage v sense C v bat , v bat = 5.0v 14 mv input current limit voltage v clp C v cln , i lim open l 70 95 115 mv clp input bias current 120 na cln input bias current 36 a i lim bias current l 43 50 57 a system current limit programming gain v ilim /(v clp C v cln ), v ilim = 0.5v 11.5 v/v maximum charge current sense voltage v sense C v bat , v bat = 7.5v, v rng/ss > 1.1v l 88 95 103 mv c/10 trigger sense voltage v sense C v bat l 4.5 8.6 12.3 mv bat input bias current charging terminated 0.1 1 a sense input bias current charging terminated 0.1 1 a rng/ss bias current l 44 50 56 a charge current limit programming gain v rng/ss /(v sense C v bat ), v rng/ss = 0.5v l 8.5 10.8 12.5 v/v ntc range limit (high) v ntc rising l 1.25 1.36 1.45 v ntc range limit (low) v ntc falling l 0.27 0.29 0.31 v ntc threshold hysteresis % of threshold 10 % ntc disable impedance minimum external impedance to gnd l 150 470 k? ntc bias current v ntc = 0.75v l 46.5 50 53.5 a shutdown threshold v shdn rising l 1.15 1.20 1.23 v shutdown hysteresis 95 mv shdn input bias current C10 na status low voltage v chrg , v fault , v acpr , load = 10ma l 0.45 v
lt3651-8.2/lt3651-8.4 4 36518284f note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the lt3651-8.2/lt3651-8.4 are tested under pulse loaded conditions such that t j = t a . the lt3651-8.2e/lt3651-8.4e are guaranteed to meet performance specifications from 0c to 85c junction temperature. specifications over the C40c to 125c operating junction temperature range are assured by design, characterization and correlation with statistical process controls. the lt3651-8.2i/lt3651-8.4i are guaranteed over the full C40c to 125c operating junction temperature range. the junction temperature (t j in c) is calculated from the ambient temperature (t a in c) and power dissipation (p d in watts) according to the formula: t j = t a + p d ? ja where ja (in c/w) is the package thermal impedance. note 3: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. the maximum rated junction temperature will be exceeded when this protection is active. continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. electrical characteristics the l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at t a = 25c (note 2). v in = 20v, shdn = 2v, sense = b at = v b at ( f lt ) , c timer = 0.68f, r t = 50k, clp = cln = v in , boost C sw = 4v. parameter conditions min typ max units timer charge/discharge current 25 a timer disable threshold l 0.1 0.25 v full charge cycle time-out 3 hour precondition timeout 22.5 minute timer accuracy l C13 13 % switcher operating frequency, f o r t = 50k r t = 250k 1.1 250 mhz khz minimum sw on- time, t on(min) 150 ns
lt3651-8.2/lt3651-8.4 5 36518284f battery float voltage vs temperature v in standby mode current vs temperature sense and b at pin currents vs b at voltage (v sense = v b at ) c/10 threshold (v sense C v b at ) vs temperature maximum charge current vs v rng/ss as a percentage of programmed i in(max) maximum input current vs v ilim as a percentage of programmed i in(max) typical performance characteristics i chg current limit (v sense C v b at ) vs temperature charge current vs v b at as a percentage of programmed i chg(max) temperature (c) ?50 ?25 ?v bat(flt) (%) 0 0.5 125 36518284 g01 ?0.5 ?1.0 0 100755025 1.0 temperature (c) ?50 50 i vin (a) 60 70 80 ?25 0 25 50 36518284 g02 75 90 100 55 65 75 85 95 100 v bat (v) 0 ?350 current (a) ?300 ?200 ?150 ?100 150 0 2 4 5 9 36518284 g03 ?250 50 100 ?50 1 3 6 7 8 i sense i bat lt3651-8.4 temperature (c) ?50 7 v sense ? v bat (mv) 8 9 10 11 ?25 0 25 50 36518284 g04 75 100 125 v rng/ss (v) 0 0 i chg(max) (%) 20 40 60 80 120 0.2 0.4 0.6 0.8 36518284 g05 1.0 1.2 100 temperature (c) ?50 99.0 v sense ? v bat (mv) 99.5 100.0 100.5 101.0 ?25 0 25 50 36518284 g06 75 100 125 v bat (v) 5 0 i chg (%) 20 40 60 80 100 120 6 7 8 9 36518284 g07 lt3651-8.4 v ilim (v) 0 0 i in(max) (%) 20 40 60 80 120 0.2 0.4 0.6 0.8 36518284 g08 1.0 1.2 100
lt3651-8.2/lt3651-8.4 6 36518284f topside switch v on vs temperature boost drive vs boost voltage bottom side switch v on vs temperature boost switch drive vs switch current timer resistor (r t ) vs period and frequency switch drive (i bst /i sw ) vs temperature oscillator frequency vs temperature typical performance characteristics temperature (?c) ?50 v in ? v sw (mv) 600 650 700 25 75 36518284 g10 550 500 ?25 0 50 100 125 450 400 i sw = 4a temperature (c) ?50 ?250 v sw (mv) ?200 ?150 ?100 ?50 ?25 0 25 50 26518284 g11 75 100 125 i sw = 4a temperature (c) ?50 15 i bst /i sw (ma/a) 20 25 30 35 ?25 0 25 50 26518284 g12 75 100 125 i sw = 4a v bst ? v in = 4v i sw (a) 0 10 i bst /i sw (ma/a) 20 30 40 50 60 70 1 2 3 4 36518284 g14 5 temperature (c) ?50 ?1.0 frequency deviation (%) ?0.5 0 0.5 1.0 ?25 0 25 50 26518284 g15 75 100 125 r t = 54.9k period (s) frequency (khz) 1 1000 300 350 400 5 200 36518284 g16 250 200 2 500 3 333 4 250 6 167 150 100 50 r t (k) input current limit voltage threshold vs temperature temperature (c) ?50 ?(v clp ? v cln ) (mv) 1.5 25 36518284 g09 0 ?1.0 ?25 0 50 ?1.5 ?2.0 2.0 1.0 0.5 ?0.5 75 100 125 r ilim open r ilim = 10k v bst ? v in (v) 2.5 i bst /i sw (ma/a) 40 50 60 6.5 36518284 g13 30 20 10 3.5 4.5 5.5 7.5 i sw = 4a
lt3651-8.2/lt3651-8.4 7 36518284f pin functions ntc (pin 1): battery temperature monitor pin. this pin is used to monitor battery temperature. typically a 10k? ntc (negative temperature coefficient) thermistor (b = 3380) is embedded with the battery and connected from the ntc pin to ground. the pin sources 50a into the resistor and monitors the voltage across the therm- istor, regulating charging based on the voltage. if this function is not desired, leave the ntc pin unconnected. acpr (pin 2): open-collector ac present status pin. this pin sinks current to indicate that v in is valid and the charger is on. typically a resistor pull-up is used on this pin. this pin can be pulled up to voltages as high as v in when disabled, and can sink currents up to 10ma when enabled. b at (pin 3): battery voltage monitor pin. this pin moni- tors battery voltage. a kelvin connection is made to the battery from this pin and a decoupling capacitor (c bat ) is placed from this pin to ground. the charge function operates to achieve the final float voltage at this pin. the auto-restart feature initiates a new charging cycle when the voltage at the bat pin falls 2.5% below this float voltage. once the charge cycle is termi- nated, the input bias current of the bat pin is reduced to <0.1a to minimize battery discharge while the charger remains connected. sense (pin 4): charge current sense pin. the charge current is monitored with a sense resistor (r sense ) con- nected between this pin and the bat pin. the inductor current flows through r sense to the battery. the voltage across this resistor sets the average charge current. the maximum average charge current (i max ) corresponds to 95mv across the sense resistor. boost (pin 5): bootstrapped supply rail for switch drive. this pin facilitates saturation of the high side switch transistor. connect a 1f or greater capacitor from the boost pin to the sw pin. the operating range of this pin is 0v to 8.5v, referenced to the sw pin when the switch is high. the voltage on the decoupling capacitor is refreshed through a rectifying diode, with the anode connected to either the battery output voltage or an external source , and the cathode connected to the boost pin. gnd (pins 6, 23, 31, 37): ground. these pins are the ground pins for the part. pins 31, 34 and 37 must be connected together. pins 6 and 23 are connected via the leadframe to the exposed backside pin 37. solder the exposed backside to the pcb for good thermal and electrical connection. sw (pins 7, 11-18, 22, 38): switch output pin. these pins are the output of the charger switches. an inductor is connected between these pins and the sense pin. when the switcher is active, the inductor is charged by the high side switch from v in and discharged by the bottom side switch to gnd. solder the exposed backside, pin 38, to the pcb for good thermal connection. nc (pins 8-10,19-21): no connect. these pins can be left floating (not connected). timer (pin 24): end-of-cycle timer programming pin. a capacitor on this pin to ground determines the full charge end-of-cycle time. full charge end-of-cycle time is programmed with this capacitor. a 3 hour charge cycle is obtained with a 0.68f capacitor. this timer also controls the bad battery fault that is generated if the battery does not reach the precondition threshold voltage within one - eighth of a full cycle (22.5 minutes for a 3 hour charge cycle). the timer based termination is disabled by connecting the timer pin to ground. with the timer function disabled, charging terminates when the charge current drops below a c/10 rate, or approximately 10% of maximum charge rate. fault (pin 25): open-collector fault status output. this pin indicates charge cycle fault conditions during a battery charging cycle. typically a resistor pull-up is used on this pin. this status pin can be pulled up to voltages as high as v in when disabled, and can sink currents up to 10ma when enabled. a temperature fault causes this pin to be pulled low. if the internal timer is used for termination, a bad battery fault also causes this pin to be pulled low. if no fault conditions exist, the fault pin remains high impedance. chrg (pin 26): open-collector charger status output.
lt3651-8.2/lt3651-8.4 8 36518284f pin functions this pin indicates the battery charging status. typically a resistor pull-up is used on this pin. this status pin can be pulled up to voltages as high as v in when disabled, and can sink currents up to 10ma when enabled. chrg is pulled low during a battery charging cycle. when the charge cycle is terminated, the chrg pin becomes high impedance. if the internal timer is used for termination, the pin stays low during the charging cycle until the charge current drops below a c/10 rate, or approximately 10% of the maximum charge current. a temperature fault also causes this pin to be pulled low. shdn (pin 27): shutdown pin. this pin can be used for precision uvlo functions. when this pin rises above the 1.20v threshold, the part is enabled. the pin has 95mv of voltage hysteresis. when in shutdown mode, all charging functions are disabled. when the shdn pin is pulled below 0.4v, the ic enters a low current shutdown mode where the v in pin current is reduced to 17a. typical shdn pin input bias current is 10na. connect the pin to v in if the shutdown function is not desired. i lim (pin 28): input current limit programming. this pin allows for setting and dynamic adjustment of the system input current limit, and can be used to employ a soft-start function. the voltage on this pin sets the maximum input current by setting the maximum voltage across the input current sense resistor, placed between clp and cln. the effective range on the pin is 0v to 1v. 50a is sourced from this pin usually to a resistor (r ilim ) to ground. v iilim represents approximately 11 times the maximum voltage across the input current sense resistor. if no r ilim is used the part will default to maximum input current. soft-start functionality for input current can be imple- mented with a capacitor (c ilim ) from i lim to ground. the soft-start capacitor and the programming resistor can be implemented in parallel. clp/cln (pin 29/pin 30): system current limit positive and negative input. system current levels are monitored by connecting a sense resistor from the input power sup- ply to the clp pin, connecting a sense resistor from the clp pin to the cln pin and then connecting cln to v in . the system load is then delivered from the cln pin. the lt3651-8.2/lt3651-8.4 servo the maximum charge cur - rent required to maintain programmed maximum system current. the system current limit is set as a function of the voltage on the i lim pin and the input current sense resistor. this function is disabled by shorting clp, cln and v in together. v in (pins 32, 33, 34): charger input supply. these pins provide power for the lt3651-8.2/lt3651-8.4. charge current for the battery flows into these pins. i vin is less than 100a after charge termination. connect the pins together. rng/ss (pin 35): charge current range and soft-start pin. this pin allows for setting and dynamic adjustment of the maximum charge current, and can be used to em- ploy a soft-start function. the voltage on this pin sets the maximum charge current by setting the maximum voltage across the charge current sense resistor, r sense , placed between sense and bat . the effective range on the pin is 0v to 1v. 50a is sourced from this pin usually to a resistor (r rng/ss ) to ground. v rng/ss represents approximately 10 times the maximum voltage across the charge current sense resistor . if no r rng / ss is used the part will default to maximum charge current. soft-start functionality for charge current can be imple- mented by connecting a capacitor (c rng/ss ) from rng/ss to ground. the soft-start capacitor and the programming resistor can be implemented in parallel. the rng/ss pin is pulled low during fault conditions, allowing graceful recovery from faults if c rng/ss is used. rt (pin 36): switcher oscillator timer set pin. a resis- tor from this pin to ground sets the switcher oscillator frequency . typically this is 54.9k for f osc = 1mhz.
lt3651-8.2/lt3651-8.4 9 36518284f block diagram + + 28 + ? i lim 50a 30 cln a12 a11 0.2v a14 a9 a8 a7 0.3v a10 c-ea v c 125c standby t j i th a13 v in rev cur inhibit ovlo uvlo standby osc 29 clp 36 rt 24 timer 26 chrg 25 fault 1 ntc reset enable mode (timer or c/10) terminate ss/reset count status control logic count reset count ripple counter timer osc latch r qs 35v 8.7v + ? + ? + ? + ? + ? 0.1v 1v 0.15v 5.65v ? c/10 ntc precondition + ? + ? + ? + ? v-ea + ? + ? + 10r s r s r s 50a ss/reset + + 8.2v* 8.0v** 2.4v 365148284 bd terminate + 1.2v + + + ? a6 a5 acpr + ? a4 a3 a1 1.36v 0.29v a2 0.7v gnd 6, 23, 31, 37 v bat(flt) : 8.2v for lt3651-8.2, 8.4v for lt3651-8.4 v bat(flt) ? ?v rechrg : 8v for lt3651-8.2, 8.2v for lt3651-8.4 v bat(pre) : 5.65v for lt3651-8.2, 5.8v for lt3651-8.4 1.3v standby v int 2.7v 2.25 + ? + ? + ? + ? 46a * ** ? 50a 2 shdn 27 rng/ss 35 bat 3 sense 4 boost 5 sw 7, 11-18, 22, 38 v in 32, 33, 34
lt3651-8.2/lt3651-8.4 10 36518284f operation overview the lt3651-8.2/lt3651-8.4 are complete li-ion battery chargers, addressing wide input voltage and high currents (up to 4a). high charging efficiency is produced with a constant frequency, average current mode synchronous step-down switcher architecture. the charger includes the necessary circuitry to allow for programming and control of constant current, constant voltage (cc/cv) charging with both current only and timer termination. high charging efficiency is achieved by the switcher by using a bootstrapped supply for low switch drop for the high side driver and a mosfet for the low side (synchronous) switch. maximum charge current is set with an external sense re- sistor in series with the inductor and is adjustable through the rng/ss pin. total system input current is monitored with an input sense resistor and is used to maintain con- stant input current by regulating battery charge current. it is adjustable through the i lim pin. if the battery voltage is low, charge current is automatically reduced to 15% of the programmed current to provide safe battery preconditioning. once the battery voltage climbs above the battery precondition threshold, the ic automatically increases the maximum charge current to the full programmed value. charge termination can occur when charge current de- creases to one-tenth the programmed maximum charge current (c/10 termination). alternately, termination can be time based through the use of an internal program- mable charge cycle control timer. when using the timer termination, charging continues beyond the c/10 level to top-off a battery . charging typically terminates three hours after initiation. when the timer-based scheme is used, bad battery detection is also supported. a system fault is triggered if a battery stays in precondition mode for more than one-eighth of the total charge cycle time. once charging is terminated and the lt3651 -8.2/ lt3651 - 8.4 are not actively charging, the ic automatically enters a low current standby mode in which supply bias currents are reduced to <85a. if the battery voltage drops 2.5% from the full charge float voltage, the lt3651-8.2/ lt3651-8.4 engage an automatic charge cycle restart. the ic also automatically restarts a new charge cycle after a bad battery fault once the failed battery is removed and replaced with another battery. after charging is completed the input bias currents on the pins connecting to the battery are reduced to minimize battery discharge. the lt3651-8.2/lt3651-8.4 contain provisions for a bat- tery temperature monitoring circuit . battery temperature is monitored by using a ntc thermistor located with the battery . if the battery temperature moves outside a safe charging range of 0 c to 40 c the charging cycle suspends and signals a fault condition. the lt3651-8.2/lt3651-8.4 contain two digital open- collector outputs, which provide charger status and signal fault conditions. these binary coded pins signal battery charging , standby or shutdown modes, battery temperature faults and bad battery faults. a precision undervoltage lockout is possible by using a resistor divider on the shutdown pin (shdn). the input supply current is 17a when the ic is in shutdown. general operation (see block diagram) the lt3651-8.2/lt3651-8.4 use an average current mode control loop architecture to control average charge current . the lt 3651 -8.2/ lt 3651 -8.4 sense charger output voltage via the bat pin. the difference between this voltage and the internal float voltage reference is integrated by the voltage error amplifier (v - ea). the amplifier output voltage (i th ) corresponds to the desired average voltage across the inductor sense resistor, r sense , connected between the sense and bat pins. the i th voltage is divided down by a factor of 10, and provides a voltage offset on the input of the current error amplifier (c - ea). the difference be- tween this imposed voltage and the current sense resistor voltage is integrated by c-ea. the resulting voltage (v c ) provides a voltage that is compared against an internally generated ramp and generates the switch duty cycle that controls the chargers switches.
lt3651-8.2/lt3651-8.4 11 36518284f operation the i th error voltage corresponds linearly to average cur - rent sensed across the inductor current sense resistor. maximum charge current is controlled by clamping the maximum voltage of i th to 1v. this limits the maximum current sense voltage (voltage across r sense ) to 95mv setting the maximum charge current. manipulation of maximum charge current is possible through the rng/ss and i lim pins (see the rng /ss: dynamic charge current adjust, rng/ss: soft-start and i lim control sections). if the voltage on the bat pin (v bat ) is below v bat (pre) , a7 initiates the precondition mode. during the precondition interval , the charger continues to operate in constant cur - rent mode, but the i th clamp is reduced to 0.15v reducing charge current to 15% of the maximum programmed value . as v bat approaches the float voltage (v float ) the voltage error amp v-ea takes control of i th and the charger transi- tions into constant voltage (cv) mode. as this occurs, the i th voltage falls from the limit clamp and charge current is reduced from the maximum value. when the i th voltage falls below 0.1v, a8 signals c/10. if the charger is config- ured for c/10 termination the charge cycle is terminated. once the charge cycle is terminated, the chrg status pin becomes high impedance and the charger enters low current standby mode. the lt3651-8.2/lt3651-8.4 contain an internal charge cycle timer that terminates a successful charge cycle af- ter a programmed amount of time. this timer is typically programmed to achieve end-of-cycle in three hours, but can be configured for any amount of time by setting an appropriate timing capacitor value (c timer ). when timer termination is used, the charge cycle does not terminate after c/10 is achieved. because the chrg status pin re- sponds to the c/10 current level, the ic will indicate a fully charged battery status, but the charger will continue to source low currents. at the programmed end of the cycle time the charge cycle stops and the part enters standby mode. if the battery did not achieve at least 97.5% of the full float voltage at the end-of-cycle, charging is deemed unsuccessful and another full-timer cycle is initiated. use of the timer function also enables bad battery detec- tion. this fault condition is achieved if the battery does not respond to preconditioning and the charger remains in (or enters) precondition mode after one-eighth of the programmed charge cycle time. a bad battery fault halts the charging cycle, the chrg status pin goes high imped- ance and the fault pin is pulled low. when the lt3651-8.2/lt3651-8.4 terminate a charging cycle, whether through c/10 detection or by reaching timer end-of-cycle, the average current mode analog loop remains active but the internal float voltage reference is reduced by 2.5%. because the voltage on a successfully charged battery is at the full float voltage, the voltage er - ror amp detects an overvoltage condition and rails low. when the voltage error amp output drops below 0.3v, the ic enters standby mode, where most of the internal circuitry is disabled and the v in bias current is reduced to <100a. when the voltage on the bat pin drops below the reduced float reference level, the output of the voltage error amp will climb, at which point the ic comes out of standby mode and a new charging cycle is initiated. the system current limit allows charge current to be reduced in order to maintain a constant input current. input current is measured via a resistor (r cl ) that is placed between the clp and cln pins. power is applied through this resistor and is used to supply both v in of the chip and other system loads. an offset produced on the inputs of a12 sets the threshold. when that threshold is achieved, i th is reduced, lowering the charge current thus maintaining the maximum input current. 50a of current is sourced from i lim to a resistor (r ilim ) that is placed from that pin to ground. the voltage on i lim determines the regulating voltage across r cl . 1 v on i lim corresponds to 95mv across r cl . the i lim pin clamps internally to 1v maximum. if the junction temperature of the die becomes excessive, a10 activates decreasing i th and reduces charge current. this reduces on-chip power dissipation to safe levels but continues charging.
lt3651-8.2/lt3651-8.4 12 36518284f applications information osc frequency a precision resistor to ground sets the lt3651 -8.2/ lt3651 - 8.4 switcher oscillator frequency, f osc , permit- ting user adjustability of the frequency value. typically this frequency is in the 200khz to 1mhz range. power consideration may necessitate lower frequency operation especially if the charger is operated with very high voltages . adjustability also allows the user to position switching harmonics if their system requires. the timing resistor, r t , value is set by the following: r t = 54.9 f osc mhz ( ) k ? ( ) set r t to 54.9k for 1mhz operation. v in input supply the lt3651-8.2/lt3651-8.4 are biased directly from the charger input supply through the v in pin. this supply provides large switched currents, so a high quality, low esr decoupling capacitor is required to minimize volt- age glitches on v in . the v in decoupling capacitor (c vin ) absorbs all input switching ripple current in the charger. size is determined by input ripple voltage with the fol- lowing equation: c in(bulk) i chg(max) ? v bat f osc mhz ( ) ? ? v in ? v in f ( ) where ?v in is the input ripple, i chg(max) is the maximum charge current and f is the oscillator frequency. a good starting point for ?v in is 0.1v. worst -case conditions are with v bat high and v in at minimum. so for a 15v v in(min) , i max = 4a and a 1mhz oscillator frequency: c in(bulk) = 4 ? 8.2 1? 0.1? 15 = 22f the capacitor must have an adequate ripple current rating. rms ripple current, i cvin(rms) is approximated by: i cvin(rms) i chg(max) ? v bat v in ? ? ? ? ? ? ? v in v bat ? 1 which has a maximum at v in t v bat , where i cvin(rms) = i chg(max) /2. in the example above that requires a capaci- tor rms rating of 2a. boost supply the boost bootstrapped supply rail drives the internal switch and facilitates saturation of the high side switch transistor. the boost voltage is normally created by connecting a 1f capacitor from the boost pin to the sw pin. operating range of the boost pin is 2v to 8.5v, as referenced to the sw pin. the boost capacitor is normally charged via a diode con- nected from the battery or an external source through the low side switch. rate the diode average current greater than 0.1a and its reverse voltages greater than v in(max) . if an external supply that is greater than the input is avail- able (v boost C v in > 2 v), it may be used in place of the bootstrap capacitor and diode. v in ,v boost start-up requirement the lt3651-8.2/lt3651-8.4 operate with a v in range of 9v to 32v. the charger begins a charging cycle when the detected battery voltage is below the auto-restart float voltage and the part is enabled.
lt3651-8.2/lt3651-8.4 13 36518284f when v in is below 10.5v and the boost capacitor is uncharged, the high side switch would normally not have sufficient head room to start switching. during normal operation the low side switch is deactivated when charge current is very low to prevent reverse current in the induc- tor. however in order to facilitate start-up, the lt3651- 8.2/lt3651-8.4 enable the switch if v boost voltage is low. this allows initial charging of the boost capacitor which then permits the high side switch to saturate and efficiently operate. the boost capacitor charges to full potential after a few cycles. the design should consider that as the switcher turns on and input current increases, input voltage drops due to source input impedance and input capacitance. this po- tentially allows the input voltage to drop below the internal v in uvlo turn-on and thus disrupt normal behavior and potentially stall start-up. if an input current sense resis- tor is used, its drop must be considered as well. these problems are worsened because input current is largest at low input voltage. pay careful attention to drops in the power path. adding a soft-start capacitor to the rng/ss pin and setting uvlo to 9v with the shdn pin is required at low v in . b at output decoupling it is recommended that the lt3651-8.2/lt3651-8.4 char - ger output have a decoupling capacitor. if the battery can be disconnected from the charger output this capacitor is required. the value of this capacitor (c bat ) is related to the minimum operational v in voltage such that: c bat 20f + 350f v in(min) ? ? ? ? ? ? the voltage rating on c bat must meet or exceed the bat- tery float voltage. r sense : charge current programming the lt3651-8.2/lt3651-8.4 charger is configurable to charge at average currents as high as 4a (see figure 1). if rng/ss maximum voltage is not limited, the inductor sense resistor, r sense , has 95mv across it at maximum charge current so: r sense = 0.095v i chg(max) where i chg(max) is the maximum average charge current. r sense is 24m? for a 4a charger. applications information figure 1. programming maximum charge current using r sense sw boost sense r sense lt3651-8.2 lt3651-8.4 bat 365142 f01 +
lt3651-8.2/lt3651-8.4 14 36518284f inductor selection the primary criteria for inductor value selection in the lt3651-8.2/lt3651-8.4 charger is the ripple current cre- ated during switching. ripple current, ?i max , is typically set within a range of 25% to 35% of the maximum charge current, i max . this percentage typically gives a good com- promise between losses due to ripple and inductor size. an approximate formula for inductance is: l = v bat + v f ? i max ? f osc mhz ( ) ? 1C v bat + v f v in + v f ? ? ? ? ? ? h ( ) worse -case ripple is at high v in and high v bat . v f is the forward voltage of the synchronous switch ( approximately 0.14v at 4a). figure 2 shows inductance for the case of a 4a charger. the inductor must have a saturation current equal to or exceeding the maximum peak current in the inductor. peak current is i chg(max) + ?i chg(max) /2. magnetics vendors typically specify inductors with maxi- mum rms and saturation current ratings . select an inductor that has a saturation current rating at or above peak current , and an rms rating above i chg(max) . inductors must also meet a maximum volt-second product requirement. if this specification is not in the data sheet of an inductor, consult the vendor to make sure the maximum volt-second prod- uct is not being exceeded by your design. the minimum required volt-second product is approximately: v bat f osc(mhz) s 1? v bat v in(max) ? ? ? ? ? ? v s s ( ) acceptable power inductors are available from several manufacturers such a wrth elektronik, vishay, coilcraft and tdk. system input current limit the lt3651-8.2/lt3651-8.4 contain a powerpath ? control feature to help manage supply load currents. the charger adjusts charger output current in response to a system load so as to maintain a constant input supply load. if overall input supply current exceeds the programmed maximum value the charge current is diminished in an attempt to keep supply current constant. one application where this is helpful is if you have a current limited input supply. setting the maximum input current limit below the supply limit prevents supply collapse. a resistor, r cl , is placed between the input supply and the system and charger loads as shown in figure 3. applications information figure 2. inductance (l) vs maximum v in figure 3. input current limit configuration v in(max) (v) 9 l (h) 2 3 25 36512 f02 1 0 10 15 20 30 4 i max = 4a f osc = 1mhz 25% to 35% ripple clp cln system load input supply v in r lim r cl lt3651-8.2 lt3651-8.4 i lim 365142 f03
lt3651-8.2/lt3651-8.4 15 36518284f figure 4. input current limit for 4a maximum charger and 6a system current limit system load current (a) input current charge current (v in referred) 2 2 365142 f04 1 1 0 0 3 current (a) the lt 3651 -8.2/ lt 3651 -8.4 source 50 a from the i lim pin , so a voltage is developed by simply connecting a resistor to ground. the voltage on the i lim pin corresponds to 11.5 times the maximum voltage across the input sense resistor (r cl ). input current limit is defined by: i input(max) = v ilim 11.5 ? r cl = 50a ? r ilim 11.5 ? r cl the programming range for i lim is 0 v to 1 v . voltages higher than 1v have no effect on the maximum input current. the default maximum sense voltage is 95mv and is obtained if r ilim is greater than 20k or if the pin is left open. for example, say you want a maximum input current of 2a and the charger is designed for 4a maximum average charge current , which is 1a v in referred (4a times duty cycle). using the full i lim range, the maximum voltage across r cl is 95mv. so r cl is set at 95mv/2a = 48m. when the system load exceeds 1a (= 2a C 1a) charge current is reduced such that the total input current stays at 2a. when the system load is 2a the charge current is 0. this feature only controls charge current so if the system load exceeds the maximum limit and no other limitation is designed, the input current exceeds the maximum desired, though the charge current reduces to 0a. when the input limiter reduces charge current it does not impact the internal system timer if used. see figure 4. if reduced voltage overhead or better efficiency is required then reduce the maximum voltage across r cl . so for instance, a 10k r ilim sets the maximum r cl voltage to 43mv. this reduction comes at the expense of slightly increased limit variation. note the lt3651-8.2/lt3651-8.4 internally integrate the input limit signals. this should normally provide sufficient filtering and reduce the sensitivity to current spikes. for the best accuracy take care to provide good kelvin con- nections from r cl to clp, cln. further flexibility is possible by dynamically altering the i lim pin. different resistor values could be switched in to create unique input limit conditions. the i lim pin can also be tied to a servo amplifier for other options. see the information in the following section concerning i rng/ss programming for examples. applications information
lt3651-8.2/lt3651-8.4 16 36518284f rng/ss: dynamic current adjust the rng/ss pin gives the user the capability to adjust maximum charge current dynamically. the part sources 50a from the pin, so connecting a resistor to ground develops a voltage. the voltage on the rng/ss pin cor - responds to ten times the maximum voltage across the charge current sense resistor, r sense . the defining equa- tions for charge current are: i max(rng/ss) = v rng/ss 10.8 ? r sense = 50a ? r rng/ss 10.8 ? r sense i max(rng/ss) is the maximum charge current. the programming range for rng/ss is 0v to 1v. voltages higher than 1v have no effect on the maximum charge current. the default maximum sense voltage is 95mv and is obtained if r rng/ss is greater than 20k or if the pin is left open. for example, say you want to reduce the maximum charge current to 50% of the maximum value. set rng/ss to 0.5v (50% of 1v), imposing a 46mv maximum sense voltage. per the above equation , 0.5v on rng/ss requires a 10k resistor. if the charge current needs to be dynamically adjustable then figure 5 shows one method. active servos can also be used to impose voltages on the rng/ss pin, provided they can only sink current. active circuits that source current cannot be used to drive the rng/ss pin. an example is shown in figure 6. rng/ss: soft-start soft-start functionality is also supported by the rng/ss pin. the 50a sourced from the rng/ss pin can linearly charge a capacitor, c rng/ss , connected from the rng/ ss pin to ground (see figure 7). the maximum charge current follows this voltage. thus, the charge current increases from zero to the fully programmed value as the capacitor charges from 0v to 1v. the value of c rng/ss is calculated based on the desired time to full current (t ss ) following the relation: c rng/ss = 50att ss the rng/ss pin is pulled to ground internally when charg- ing is terminated so each new charging cycle begins with a soft-start cycle. rng/ss is also pulled to ground during bad battery and ntc fault conditions, so a graceful recovery from these faults is possible. applications information figure 5. using the rng/ss pin for digital control of maximum charge current figure 6. driving the rng/ss pin with a current-sink active servo amplifier figure 7. using the rng/ss pin for soft-start lt3651-8.2 lt3651-8.4 rng/ss 10k 365142 f05 logic high = half current rng/ss servo reference 365142 f06 + ? lt3651-8.2 lt3651-8.4 rng/ss c rng/ss 365142 f07 lt3651-8.2 lt3651-8.4
lt3651-8.2/lt3651-8.4 17 36518284f applications information status pins the lt 3651 -8.2/ lt 3651 -8.4 report charger status through two open-collector outputs, the chrg and fault pins. these pins can accept voltages as high as v in , and can sink up to 10ma when enabled . the chrg pin indicates that the charger is delivering cur - rent at greater than a c/10 rate, or one-tenth of the pro- grammed maximum charge current . the fault pin signals bad battery and ntc faults. these pins are binary coded, and signal state following the table below. on indicates the pin pulled low, and off indicates pin high impedance. table 1. status pins state table status pins state charger status chrg fault off off not chargingstandby or shutdown mode off on bad battery fault (precondition timeout/eoc failure) on off normal charging at c/10 or greater on on ntc fault (pause) c/10 termination the lt3651-8.2/lt3651-8.4 support a low current based termination scheme, where a battery charge cycle termi- nates when the current output from the charger falls to below one-tenth the maximum current, as programmed with r sense . the c/10 threshold current corresponds to 9mv across r sense . this termination mode is engaged by shorting the timer pin to ground. when c/10 termination is used, a lt3651-8.2/lt3651-8.4 charger sources battery charge current as long as the aver - age current level remains above the c/10 threshold. as the full-charge float voltage is achieved, the charge current falls until the c/10 threshold is reached, at which time the charger terminates and the lt3651-8.2/lt3651 - 8.4 enter standby mode. the chrg status pin follows the charge cycle and is high impedance when the charger is not actively charging. when v bat drops below 97.5% of the full-charged float voltage, whether by battery loading or replacement of the battery , the charger automatically re-engages and starts charging. there is no provision for bad battery detection if c/10 termination is used. timer termination the lt 3651 -8.2/ lt 3651 -8.4 support a timer -based termi - nation scheme , in which a battery charge cycle is terminated after a specific amount of time elapses. timer termination is engaged when a capacitor (c timer ) is connected from the timer pin to ground. the timer cycle end-of-cycle (t eoc ) occurs based on c timer following the relation: c timer = t eoc hrs ( ) 3 ? 0.68 f ( ) so a typical 3 hour timer end-of-cycle would use a 0.68f capacitor. the chrg status pin continues to signal charging at a c/10 rate, regardless of which termination scheme is used. when timer termination is used, the chrg status pin is pulled low during a charge cycle until the charger output current falls below the c/10 threshold. the charger continues to top off the battery until timer end-of-cycle, when the lt3651-8.2/lt3651-8.4 terminate the charge cycle and enters standby mode. termination at the end of the timer cycle only occurs if the
lt3651-8.2/lt3651-8.4 18 36518284f applications information charge cycle was successful. a successful charge cycle occurs when the battery is charged to within 2.5% of the full-charge float voltage. if a charge cycle is not success- ful at end-of-cycle, the timer cycle resets and charging continues for another full-timer cycle. when v bat drops below 97.5% of the full-charge float voltage, whether by battery loading or replacement of the battery , the charger automatically re-engages and starts charging. precondition and bad battery fault a lt3651-8.2/lt3651-8.4 charger has a precondition mode, in which charge current is limited to 15% of the programmed i max , as set by r sense . the precondition current corresponds to 14mv across r sense . precondition mode is engaged while the voltage on the bat pin is below the precondition threshold (v bat (pre) ). once the bat voltage rises above the precondition thresh- old, normal full-current charging can commence. the lt3651-8.2/lt3651-8.4 incorporate 2.5% of threshold for hysteresis to prevent mode glitching. when the internal timer is used for termination, bad bat- tery detection is engaged. this fault detection feature is designed to identify failed cells. a bad battery fault is triggered when the voltage on bat remains below the precondition threshold for greater than one-eighth of a full timer cycle (one-eighth end-of-cycle). a bad battery fault is also triggered if a normally charging battery re-enters precondition mode after one-eighth end-of-cycle. when a bad battery fault is triggered, the charge cycle is suspended, so the chrg status pin becomes high impedance. the fault pin is pulled low to signal a fault detection. the rng/ss pin is also pulled low during this fault, to accommodate a graceful restart, in the event that a soft-start function is incorporated (see the rng/ss: soft-start section). cycling the chargers power or shdn function initiates a new charge cycle, but a lt3651-8.2/lt3651-8.4 charger does not require a reset. once a bad battery fault is de- tected, a new timer charge cycle initiates when the bat pin exceeds the precondition threshold voltage. during a bad battery fault, 1ma is sourced from the charger. removing the failed battery allows the charger output voltage to rise and initiate a charge cycle reset. in that way removing a bad battery resets the lt3651-8.2/lt3651-8.4. a new charge cycle is started by connecting another battery to the charger output.
lt3651-8.2/lt3651-8.4 19 36518284f applications information battery temperature fault: ntc the lt3651-8.2/lt3651-8.4 can accommodate battery tem- perature monitoring by using an ntc ( negative temperature coefficient ) thermistor close to the battery pack . the temper - ature monitoring function is enabled by connecting a 10k , b = 3380 ntc thermistor from the ntc pin to ground. if the ntc function is not desired, leave the pin unconnected. the ntc pin sources 50a and monitors the voltage dropped across the 10k thermistor. when the voltage on this pin is above 1.36v (0c) or below 0.29v (40c), the battery temperature is out of range, and the lt3651-8.2/ lt3651-8.4 trigger an ntc fault. the ntc fault condition remains until the voltage on the ntc pin corresponds to a temperature within the 0c to 40c range. both hot and cold thresholds incorporate hysteresis that corresponds to 2.5c. during an ntc fault, charging is halted and both status pins are pulled low. if timer termination is enabled, the timer count is suspended and held until the fault condition is relieved. the rng/ss pin is also pulled low during this fault, to accommodate a graceful restart in the event that a soft-start function is being incorporated (see the rng/ ss: soft- start section). if higher operational charging temperatures are desired, the temperature range can be expanded by adding series resistance to the 10k ntc resistor. adding a 0.91k (0tc) resistor will increase the effective temperature threshold to 45c. thermal foldback the lt3651-8.2/lt3651-8.4 contain a thermal foldback protection feature that reduces maximum charger output current if the internal ic junction temperature approaches 125c. in most cases, on- chip temperature servos such that any overtemperature conditions are relieved with only slight reductions in maximum charge current. in some cases, the thermal foldback protection feature can reduce charge currents below the c/10 threshold. in applications that use c/10 termination (timer = 0 v), the lt3651-8.2/lt3651-8.4 suspend charging and enters standby mode until the overtemperature condition is relieved. layout considerations the lt3651-8.2/lt3651-8.4 switch node has rise and fall times that are typically less than 10ns to maximize conver - sion efficiency. these fast switch times require care in the board layout to minimize noise problems. the philosophy is to keep the physical area of high current loops small (the inductor charge/discharge paths) to minimize magnetic radiation. keep traces wide and short to minimize parasitic inductance and resistance and shield fast switching volt- age nodes (sw, boost) to reduce capacitive coupling.
lt3651-8.2/lt3651-8.4 20 36518284f the switched node (sw pin) trace should be kept as short as possible to minimize high frequency noise. the v in capacitor (c in ) should be placed close to the ic to minimize this switching noise. short, wide traces on these nodes minimize stray inductance and resistance. keep the boost decoupling capacitor in close proximity to the ic to minimize ringing from trace inductance. route the sense and bat traces together and keep the traces as short as possible. shielding these signals from switching noise with ground is recommended. make kelvin connections to the battery and sense resistor. keep high current paths and transients isolated from battery ground, to assure an accurate output voltage reference. effective grounding is achieved by considering switched current in the ground plane, and careful compo- nent placement and orientation can effectively steer these high currents such that the battery reference does not get corrupted. figure 8 illustrates the high current, high speed current loops. when the top switch is enabled (charge loop), current flows from the input bypass capacitor (c in ) through the switch and inductor to the battery positive terminal . when the top switch is disabled ( discharge loop ), current to the battery positive terminal is provided from ground through the synchronous switch. in both cases, these switched currents return to ground via the output bypass capacitor (c bat ). power considerations the lt3651-8.2/lt3651-8.4 packaging is designed to efficiently remove heat from the ic via the exposed pad on the backside of the package, which is soldered to a copper footprint on the pcb. this footprint should be made as large as possible to reduce the thermal resistance of the ic case to ambient air. consideration should be given for power dissipation and overall efficiency in a lt3651-8.2/lt3651-8.4 charger. a detailed analysis is beyond the scope of the data sheet, however following are general guidelines. the major components of power loss are: conduction and transition losses of the lt3651-8.2/lt3651-8.4 switches; losses in the inductor and sense resistors; and ac losses in the decoupling capacitors. switch conduction loss is fixed . transition losses are adjustable by changing switcher frequency. higher input voltages cause an increase in transition losses, decreasing overall efficiency. however transition losses are inversely proportional to switcher oscillator frequency so lowering operating frequency reduces these losses . but lower operating frequency usually requires higher inductance to maintain inductor ripple current (inversely proportional). inductors with larger values typically have more turns, increasing esr unless you increase wire diameter making them physically figure 8 + v in boost sw 365142 f08 c in charge discharge c boost r sense c bat battery lt3651-8.2 lt3651-8.4 applications information
lt3651-8.2/lt3651-8.4 21 36518284f larger. so there is an efficiency and board size trade-off. secondarily, inductor ac losses increase with frequency and lower ripple reduces ac capacitor losses. the following simple rules of thumb assume a charge current of 4a and battery voltage of 7.5v, with 1mhz os- cillator, 24m sense resistor and 3.3h/20m inductor. a 1% increase in efficiency represents a 0.35w reduction in power loss at 85% overall efficiency. one way to do this is to decrease resistance in the high current path. a reduction of 0.2w at 4a requires a 22m reduction in resistance. this can be done by reducing inductor esr. it is also possible to lower the sense resistance (with a reduction in r rng/ss as well), with a trade-off of slightly less accurate current accuracy. all high current board traces should have the lowest resistance possible. addition of input current limit sense resistance reduces efficiency. charger efficiency drops approximately linearly with in- creasing frequency all other things constant. at 15v v in there is a 1% improvement in efficiency for every 200khz reduction in frequency (100khz to 1mhz); at 28v v in , 1% for every 100khz. of course all of these must be experimentally confirmed in the actual charger. typical applications 9v to 32v 4a charger with high voltage current foldback shdn acpr fault chrg sw boost sense bat i lim rng/ss gnd ntc nc clp r il 1k cln 1f c bat 100f 365142 ta02a 3.3h v in sbm540 r sense 24m r t 54.9k smaz24 18.2v 120k 1n5819 lt3651-8.2/lt3651-84 v in c in 22f rt timer + 2-cell li-ion battery maximum charge current vs v in v in (v) 5 0 maximum charge current (a) 1 2 3 4 5 10 15 20 25 3651 ta02b 30 35 applications information
lt3651-8.2/lt3651-8.4 22 36518284f typical applications 12v to 32v 4a charger with low voltage current foldback using the rng/ss pin maximum charge current vs v in shdn acpr fault chrg sw boost sense bat i lim rng/ss gnd ntc clp sbm540 cln 1f nc 1f 5.1k 68k smaz9v1 9.1v c bat 100f 365142 ta03a 3.3h to system load r sense 24m r t 54.9k v in 1n5819 lt3651-82/lt3651-84 v in c in 22f rt timer + 2-cell li-ion battery v in (v) 10 maximum charge current (a) 3 4 30 3651 ta03b 2 0 15 20 25 35 5 9 v to 32v 4a charger with approximately constant input power shdn acpr fault chrg sw boost sense bat i lim rng/ss gnd ntc clp r sense 50m cln 1f 0.1f 22k 180k 180k 20k 8.2v c bat 100f 365142 ta05a 3.3h to system load r sense 24m r t 54.9k v in 1n5819 nc lt3651-8.2/lt3651-8.4 v in c in 22f 6.2v rt timer sbm540 + 2-cell li-ion battery input power vs v in v in (v) 5 15 input power (w) 17 19 21 10 15 20 25 365142 ta05b 30 23 25 16 18 20 22 24 35
lt3651-8.2/lt3651-8.4 23 36518284f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description please refer to http://www .linear.com/designtools/packaging/ for the most recent package drawings. 5.00 0.10 note: 1. drawing is not a jedec package outline 2. drawing not to scale 3. all dimensions are in millimeters pin 1 top mark (see note 6) 35 1 2 36 bottom view?exposed pad 4.50 ref 6.00 0.10 r = 0.125 typ 0.25 0.05 2.54 0.10 3.45 0.10 (uhe36ma) qfn 0410 rev a 0.50 bsc 3.45 0.10 1.52 0.10 2.54 0.05 1.52 0.05 3.45 0.05 3.45 0.05 0.75 0.05 0.00 ? 0.05 0.200 ref recommended solder pad layout apply solder mask to areas that are not soldered 3.50 ref 0.40 0.10 0.70 0.05 0.50 bsc 4.50 ref 3.50 ref 4.10 0.05 5.50 0.05 5.10 0.05 6.50 0.05 0.25 0.05 package outline 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.20mm on any side 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 notch r = 0.30 typ or 0.35 45 chamfer r = 0.10 typ uhe package variation: uhe36ma 36-lead plastic qfn (5mm 6mm) (reference ltc dwg # 05-08-1753 rev a) 0.25 0.05 0.76 0.05
lt3651-8.2/lt3651-8.4 24 36518284f linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com linear technology corporation 2012 lt 1212 ? printed in usa part number description comments lt3651-4.1/lt3651-4.2 monolithic 4a switch mode synchronous 1-cell li-ion battery charger standalone, 4.75 v in 32v (40v abs max), 1mhz, 4a, programmable charge current timer or v/10 termination 5mm w 6mm qfn-36 package LT3650 2a monolithic li-ion battery charger high efficiency, wide input voltage range charger, time or charge current termination , automatic restart, temperature monitoring, programmable charge current, input current limit, 12-lead dfn and msop packages lt3652/lt3652hv power tracking 2a battery charger input supply voltage regulation loop for peak power tracking in ( mppt) solar applications, standalone, 4.95v v in 32v (40v abs max), 1mhz, 2a programmable charge current, timer or c/10 termination, 3mm w 3mm dfn-12 package and msop-12 packages. lt3652hv version up to v in = 34v ltc4000 high voltage high current controller for battery charging and power management complete high performance battery charger when paired with a dc/dc converter wide input and output voltage range: 3v to 60v 0.25% accurate programmable float voltage, programmable c/x or timer based charge termination ntc input for temperature qualified charging, 28-lead 4mm w 5mm qfn or ssop packages ltc4002 standalone li-ion switch mode battery charger complete charger for 1- or 2-cell li-ion batteries, onboard timer termination, up to 4a charge current, 10-lead dfn and so-8 packages ltc4006 small, high efficiency, fixed voltage li-ion battery charger with termination complete charger for 2-, 3- or 4-cell li-ion batteries, ac adapter current limit and thermistor sensor, 16-lead narrow ssop package ltc4007 high efficiency, programmable voltage battery charger with termination complete charger for 3- or 4-cell li-ion batteries, ac adapter current limit, thermistor sensor and indicator outputs, 24-lead ssop package ltc 4008 4a, high efficiency, multi- chemistry battery charger complete charger for 2- to 6-cell li-ion batteries or 4- to 18-cell nickel batteries, up to 96% efficiency, 20-lead ssop package ltc4009/ltc4009-1 ltc4009-2 high efficiency, multi- chemistry battery charger complete charger for 1- to 4-cell li-ion batteries or 4- to 18-cell nickel batteries, up to 93% efficiency, 20-lead (4mm w 4mm) qfn package, ltc4009-1 for 4.1v float voltage, ltc4009 -2 for 4.2v float voltage ltc4012/ltc4012-1/ ltc4012-2/ltc4012-3 4a, high efficiency, multi- chemistry battery charger with powerpath control powerpath control, constant-current/constant- voltage switching regulator charger, resistor, voltage/current programming, ac adapter current limit and thermistor sensor and indicator outputs, 1 to 4-cell li, up to 18-cell ni, sla and supercap compatible; 4mm w 4mm qfn-20 package; ltc4012-1 version for 4.1v li cells, ltc4012 -2 version for 4.2v li cells, ltc4012-3 version has extra gnd pin related parts typical application 9v to 32v 4a charger with 3-hour charge timeout , 6.3a input current limit, 10ms soft-start and battery temperature monitoring acpr fault chrg rt timer boost sense bat i lim gnd rng/ss ntc clp shdn sw r il 16m cln 1f nc c timer 0.68f c bat 100f 0.47f ntc b 10k 3651 ta04 3.3h to system load r sense 24m r t 54.9k v in v logic to controller 1n5819 lt3651-8.2 lt3651-8.4 v in c in 22f 1f 50k 50k 50k 50k sbm540 + 2-cell li-ion battery

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